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test.patch
diff --git a/test/raise/spectriad-mlir-stage-11-v1.mlir b/test/raise/spectriad-mlir-stage-11-v1.mlir
new file mode 100644
--- /dev/null
+++ b/test/raise/spectriad-mlir-stage-11-v1.mlir
@@ -0,0 +1,54 @@
+// RUN: loom-raise-opt --loom-lower-graph-memory --mlir-print-op-generic %s | FileCheck %s
+
+module {
+ dataflow.graph private @graph_0(
+ %start: none, %i: index, %c: i1, %m: vector<4xi1>,
+ %av: vector<4xindex>, %val: i32,
+ %a: memref<16xi32>, %b: memref<16xi32>) -> ()
+ attributes {input_segments = array<i32: 5, 0, 2>,
+ result_segments = array<i32: 0, 0, 0>} {
+ %pad = arith.constant 0 : i32
+ %g0, %gd0 = dataflow.load %a[%av] %start mask %m : memref<16xi32>, vector<4xindex>, vector<4xi32>
+ scf.if %c {
+ %v1 = vector.transfer_read %b[%i], %pad {in_bounds = [true]} : memref<16xi32>, vector<4xi32>
+ }
+ scf.if %c {
+ %v5 = vector.transfer_read %b[%i], %pad, %m {in_bounds = [true]} : memref<16xi32>, vector<4xi32>
+ vector.transfer_write %v5, %a[%i], %m {in_bounds = [true]} : vector<4xi32>, memref<16xi32>
+ }
+ dataflow.graph.return %start : none
+ }
+}
+
+// CHECK: "builtin.module"() ({
+// CHECK-NEXT: "dataflow.graph"() <{function_type = (index, i1, vector<4xi1>, vector<4xindex>, i32, memref<16xi32>, memref<16xi32>) -> (), input_segments = array<i32: 5, 0, 2>, result_segments = array<i32: 0, 0, 0>, sym_name = "graph_0", sym_visibility = "private"}> ({
+// CHECK-NEXT: ^bb0(%arg0: none, %arg1: index, %arg2: i1, %arg3: vector<4xi1>, %arg4: vector<4xindex>, %arg5: i32, %arg6: memref<16xi32>, %arg7: memref<16xi32>):
+// CHECK-NEXT: %0 = "arith.constant"() <{value = 0 : i32}> : () -> i32
+// CHECK-NEXT: %1:2 = "dataflow.load"(%arg6, %arg4, %arg0, %arg3) : (memref<16xi32>, vector<4xindex>, none, vector<4xi1>) -> (vector<4xi32>, none)
+// CHECK-NEXT: %2:2 = "dataflow.demux"(%arg2, %arg0) : (i1, none) -> (none, none)
+// CHECK-NEXT: %3:2 = "dataflow.demux"(%arg2, %arg0) : (i1, none) -> (none, none)
+// CHECK-NEXT: %4:2 = "dataflow.demux"(%arg2, %1#1) : (i1, none) -> (none, none)
+// CHECK-NEXT: %5:2 = "dataflow.demux"(%arg2, %arg1) : (i1, index) -> (index, index)
+// CHECK-NEXT: %6:2 = "dataflow.demux"(%arg2, %0) : (i1, i32) -> (i32, i32)
+// CHECK-NEXT: %7:2 = "dataflow.sync"(%2#1, %3#1) : (none, none) -> (none, none)
+// CHECK-NEXT: %8:2 = "dataflow.load"(%arg7, %5#1, %7#0) : (memref<16xi32>, index, none) -> (vector<4xi32>, none)
+// CHECK-NEXT: %9:2 = "dataflow.sync"(%4#1, %8#1) : (none, none) -> (none, none)
+// CHECK-NEXT: %10 = "dataflow.mux"(%arg2, %3#0, %3#1) : (i1, none, none) -> none
+// CHECK-NEXT: %11 = "dataflow.mux"(%arg2, %4#0, %9#0) : (i1, none, none) -> none
+// CHECK-NEXT: %12 = "dataflow.mux"(%arg2, %2#0, %2#1) : (i1, none, none) -> none
+// CHECK-NEXT: %13:2 = "dataflow.demux"(%arg2, %12) : (i1, none) -> (none, none)
+// CHECK-NEXT: %14:2 = "dataflow.demux"(%arg2, %10) : (i1, none) -> (none, none)
+// CHECK-NEXT: %15:2 = "dataflow.demux"(%arg2, %11) : (i1, none) -> (none, none)
+// CHECK-NEXT: %16:2 = "dataflow.demux"(%arg2, %arg1) : (i1, index) -> (index, index)
+// CHECK-NEXT: %17:2 = "dataflow.demux"(%arg2, %0) : (i1, i32) -> (i32, i32)
+// CHECK-NEXT: %18:2 = "dataflow.demux"(%arg2, %arg3) : (i1, vector<4xi1>) -> (vector<4xi1>, vector<4xi1>)
+// CHECK-NEXT: %19:2 = "dataflow.sync"(%13#1, %14#1) : (none, none) -> (none, none)
+// CHECK-NEXT: %20:2 = "dataflow.load"(%arg7, %16#1, %19#0, %18#1) : (memref<16xi32>, index, none, vector<4xi1>) -> (vector<4xi32>, none)
+// CHECK-NEXT: %21:2 = "dataflow.sync"(%15#1, %20#1) : (none, none) -> (none, none)
+// CHECK-NEXT: %22 = "dataflow.store"(%arg6, %16#1, %20#0, %21#0, %18#1) : (memref<16xi32>, index, vector<4xi32>, none, vector<4xi1>) -> none
+// CHECK-NEXT: %23 = "dataflow.mux"(%arg2, %15#0, %22) : (i1, none, none) -> none
+// CHECK-NEXT: %24 = "dataflow.mux"(%arg2, %13#0, %13#1) : (i1, none, none) -> none
+// CHECK-NEXT: "dataflow.graph.return"(%24, %23) <{operandSegmentSizes = array<i32: 0, 0, 0, 2>}> : (none, none) -> ()
+// CHECK-NEXT: }) : () -> ()
+// CHECK-NEXT: }) : () -> ()
+// CHECK-EMPTY: