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test.patch
diff --git a/test/raise/spectriad-mlir-stage-11-v1.mlir b/test/raise/spectriad-mlir-stage-11-v1.mlir
new file mode 100644
--- /dev/null
+++ b/test/raise/spectriad-mlir-stage-11-v1.mlir
@@ -0,0 +1,94 @@
+// RUN: loom-raise-opt --loom-lower-graph-memory %s | FileCheck %s
+
+module {
+ dataflow.graph private @graph_0(
+ %start: none, %i: index, %c: i1, %m: vector<4xi1>,
+ %av: vector<4xindex>, %val: i32,
+ %a: memref<16xi32>, %b: memref<16xi32>) -> ()
+ attributes {input_segments = array<i32: 5, 0, 2>,
+ result_segments = array<i32: 0, 0, 0>} {
+ %pad = arith.constant 0 : i32
+ %g0, %gd0 = dataflow.load %a[%av] %start mask %m : memref<16xi32>, vector<4xindex>, vector<4xi32>
+ %sc0 = dataflow.store %b[%av] %g0 %start mask %m : memref<16xi32>, vector<4xindex>, vector<4xi32>
+ scf.if %c {
+ %v1 = vector.transfer_read %b[%i], %pad {in_bounds = [true]} : memref<16xi32>, vector<4xi32>
+ vector.transfer_write %v1, %a[%i] {in_bounds = [true]} : vector<4xi32>, memref<16xi32>
+ }
+ %lb3 = arith.constant 0 : index
+ %ub3 = arith.constant 4 : index
+ %sp3 = arith.constant 1 : index
+ scf.for %k3 = %lb3 to %ub3 step %sp3 {
+ %v4 = vector.transfer_read %a[%i], %pad, %m {in_bounds = [true]} : memref<16xi32>, vector<4xi32>
+ vector.transfer_write %v4, %b[%i], %m {in_bounds = [true]} : vector<4xi32>, memref<16xi32>
+ }
+ scf.if %c {
+ %v5 = vector.transfer_read %b[%i], %pad, %m {in_bounds = [true]} : memref<16xi32>, vector<4xi32>
+ vector.transfer_write %v5, %a[%i], %m {in_bounds = [true]} : vector<4xi32>, memref<16xi32>
+ }
+ dataflow.graph.return %start : none
+ }
+}
+
+// CHECK: module {
+// CHECK-NEXT: dataflow.graph private @graph_0(%arg0: none, %arg1: index, %arg2: i1, %arg3: vector<4xi1>, %arg4: vector<4xindex>, %arg5: i32, %arg6: memref<16xi32>, %arg7: memref<16xi32>) -> () attributes {input_segments = array<i32: 5, 0, 2>, result_segments = array<i32: 0, 0, 0>} {
+// CHECK-NEXT: %c0_i32 = arith.constant 0 : i32
+// CHECK-NEXT: %data, %done = dataflow.load %arg6[%arg4] %arg0 mask %arg3 : memref<16xi32>, vector<4xindex>, vector<4xi32>
+// CHECK-NEXT: %0 = dataflow.store %arg7[%arg4] %data %done mask %arg3 : memref<16xi32>, vector<4xindex>, vector<4xi32>
+// CHECK-NEXT: %c0 = arith.constant 0 : index
+// CHECK-NEXT: %c4 = arith.constant 4 : index
+// CHECK-NEXT: %c1 = arith.constant 1 : index
+// CHECK-NEXT: %1:2 = dataflow.demux %arg2, %arg0 : (i1, none) -> (none, none)
+// CHECK-NEXT: %2:2 = dataflow.demux %arg2, %0 : (i1, none) -> (none, none)
+// CHECK-NEXT: %3:2 = dataflow.demux %arg2, %0 : (i1, none) -> (none, none)
+// CHECK-NEXT: %4:2 = dataflow.demux %arg2, %arg1 : (i1, index) -> (index, index)
+// CHECK-NEXT: %5:2 = dataflow.demux %arg2, %c0_i32 : (i1, i32) -> (i32, i32)
+// CHECK-NEXT: %6:2 = dataflow.sync %1#1, %2#1 : (none, none) -> (none, none)
+// CHECK-NEXT: %data_0, %done_1 = dataflow.load %arg7[%4#1] %6#0 : memref<16xi32>, vector<4xi32>
+// CHECK-NEXT: %7:2 = dataflow.sync %3#1, %done_1 : (none, none) -> (none, none)
+// CHECK-NEXT: %8 = dataflow.store %arg6[%4#1] %data_0 %7#0 : memref<16xi32>, vector<4xi32>
+// CHECK-NEXT: %9 = dataflow.mux %arg2, %2#0, %8 : (i1, none, none) -> none
+// CHECK-NEXT: %10 = dataflow.mux %arg2, %3#0, %8 : (i1, none, none) -> none
+// CHECK-NEXT: %11 = dataflow.mux %arg2, %1#0, %1#1 : (i1, none, none) -> none
+// CHECK-NEXT: %12 = arith.index_cast %c0 : index to i32
+// CHECK-NEXT: %13 = arith.index_cast %c4 : index to i32
+// CHECK-NEXT: %14 = arith.index_cast %c1 : index to i32
+// CHECK-NEXT: %iv, %phase = dataflow.stream %12, %13, %14 step add while slt : i32
+// CHECK-NEXT: %15 = dataflow.carry %phase, %11, %16#1 : none
+// CHECK-NEXT: %16:2 = dataflow.demux %phase, %15 : (i1, none) -> (none, none)
+// CHECK-NEXT: %17 = dataflow.invariant %phase, %arg1 : index
+// CHECK-NEXT: %after_cond, %after_value = dataflow.gate %phase, %17 : index
+// CHECK-NEXT: %18:2 = dataflow.demux %after_cond, %after_value : (i1, index) -> (index, index)
+// CHECK-NEXT: %19 = dataflow.invariant %phase, %c0_i32 : i32
+// CHECK-NEXT: %after_cond_2, %after_value_3 = dataflow.gate %phase, %19 : i32
+// CHECK-NEXT: %20:2 = dataflow.demux %after_cond_2, %after_value_3 : (i1, i32) -> (i32, i32)
+// CHECK-NEXT: %21 = dataflow.invariant %phase, %arg3 : vector<4xi1>
+// CHECK-NEXT: %after_cond_4, %after_value_5 = dataflow.gate %phase, %21 : vector<4xi1>
+// CHECK-NEXT: %22:2 = dataflow.demux %after_cond_4, %after_value_5 : (i1, vector<4xi1>) -> (vector<4xi1>, vector<4xi1>)
+// CHECK-NEXT: %23 = dataflow.carry %phase, %9, %29 : none
+// CHECK-NEXT: %24 = dataflow.carry %phase, %10, %29 : none
+// CHECK-NEXT: %25:2 = dataflow.demux %phase, %23 : (i1, none) -> (none, none)
+// CHECK-NEXT: %26:2 = dataflow.demux %phase, %24 : (i1, none) -> (none, none)
+// CHECK-NEXT: %27:2 = dataflow.sync %16#1, %25#1 : (none, none) -> (none, none)
+// CHECK-NEXT: %data_6, %done_7 = dataflow.load %arg6[%after_value] %27#0 mask %after_value_5 : memref<16xi32>, vector<4xi32>
+// CHECK-NEXT: %28:2 = dataflow.sync %26#1, %done_7 : (none, none) -> (none, none)
+// CHECK-NEXT: %29 = dataflow.store %arg7[%after_value] %data_6 %28#0 mask %after_value_5 : memref<16xi32>, vector<4xi32>
+// CHECK-NEXT: %30 = arith.cmpi slt, %12, %13 : i32
+// CHECK-NEXT: %31:2 = dataflow.demux %30, %16#0 : (i1, none) -> (none, none)
+// CHECK-NEXT: %32:4 = dataflow.sync %31#1, %18#0, %20#0, %22#0 : (none, index, i32, vector<4xi1>) -> (none, index, i32, vector<4xi1>)
+// CHECK-NEXT: %33 = dataflow.mux %30, %31#0, %32#0 : (i1, none, none) -> none
+// CHECK-NEXT: %34:2 = dataflow.demux %arg2, %33 : (i1, none) -> (none, none)
+// CHECK-NEXT: %35:2 = dataflow.demux %arg2, %25#0 : (i1, none) -> (none, none)
+// CHECK-NEXT: %36:2 = dataflow.demux %arg2, %26#0 : (i1, none) -> (none, none)
+// CHECK-NEXT: %37:2 = dataflow.demux %arg2, %arg1 : (i1, index) -> (index, index)
+// CHECK-NEXT: %38:2 = dataflow.demux %arg2, %c0_i32 : (i1, i32) -> (i32, i32)
+// CHECK-NEXT: %39:2 = dataflow.demux %arg2, %arg3 : (i1, vector<4xi1>) -> (vector<4xi1>, vector<4xi1>)
+// CHECK-NEXT: %40:2 = dataflow.sync %34#1, %35#1 : (none, none) -> (none, none)
+// CHECK-NEXT: %data_8, %done_9 = dataflow.load %arg7[%37#1] %40#0 mask %39#1 : memref<16xi32>, vector<4xi32>
+// CHECK-NEXT: %41:2 = dataflow.sync %36#1, %done_9 : (none, none) -> (none, none)
+// CHECK-NEXT: %42 = dataflow.store %arg6[%37#1] %data_8 %41#0 mask %39#1 : memref<16xi32>, vector<4xi32>
+// CHECK-NEXT: %43 = dataflow.mux %arg2, %36#0, %42 : (i1, none, none) -> none
+// CHECK-NEXT: %44 = dataflow.mux %arg2, %34#0, %34#1 : (i1, none, none) -> none
+// CHECK-NEXT: dataflow.graph.return values() streams() memories() complete(%44, %43 : none, none)
+// CHECK-NEXT: }
+// CHECK-NEXT: }
+// CHECK-EMPTY: