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test.mlir

// RUN: loom-raise-opt --loom-lower-graph-memory %s | FileCheck %s

module attributes {
  llvm.data_layout = "e-p:64:64",
  dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<index, 64>>
} {
  dataflow.graph private @source_memory_graph(
      %start: none, %base: !llvm.ptr, %expected: i32, %desired: i32,
      %index: i64, %cond: i1) -> ()
      attributes {input_segments = array<i32: 5, 0, 0>,
                  result_segments = array<i32: 0, 0, 0>} {
    %ptr = llvm.getelementptr inbounds %base[%index]
        : (!llvm.ptr, i64) -> !llvm.ptr, !llvm.array<4 x i8>
    %val0 = llvm.load %ptr atomic syncscope("system") monotonic {alignment = 4 : i64} : !llvm.ptr -> i32
    %rmw1 = llvm.atomicrmw _or %ptr, %desired acquire {alignment = 8 : i64} : !llvm.ptr, i32
    %rmw2 = llvm.atomicrmw min %ptr, %desired syncscope("singlethread") monotonic {alignment = 4 : i64} : !llvm.ptr, i32
    %pair3 = llvm.cmpxchg volatile %ptr, %expected, %desired syncscope("singlethread") acq_rel monotonic {alignment = 8 : i64} : !llvm.ptr, i32
    %pair4 = llvm.cmpxchg %ptr, %expected, %desired syncscope("singlethread") acq_rel seq_cst {alignment = 8 : i64} : !llvm.ptr, i32
    llvm.store %desired, %ptr atomic syncscope("system") release {alignment = 8 : i64} : i32, !llvm.ptr
    dataflow.graph.return %start : none
  }
}

// CHECK: module attributes {dlti.dl_spec = #dlti.dl_spec<index = 64 : i64>, llvm.data_layout = "e-p:64:64"} {
// CHECK-NEXT:   dataflow.graph private @source_memory_graph(%arg0: none, %arg1: !llvm.ptr, %arg2: i32, %arg3: i32, %arg4: i64, %arg5: i1, %arg6: memref<?xi32>) -> () attributes {input_segments = array<i32: 5, 0, 1>, result_segments = array<i32: 0, 0, 0>} {
// CHECK-NEXT:     %0 = llvm.getelementptr inbounds %arg1[%arg4] : (!llvm.ptr, i64) -> !llvm.ptr, !llvm.array<4 x i8>
// CHECK-NEXT:     %data, %done = dataflow.load %arg6[%0] %arg0 {contract = #dataflow.atomic_access<ordering = monotonic, sync_scope = <system>, source_alignment_bytes = 4>} : memref<?xi32>, !llvm.ptr
// CHECK-NEXT:     %old, %done_0 = dataflow.atomic_rmw %arg6[%0] %arg3 %done {contract = #dataflow.rmw_contract<kind = or, access = <ordering = acquire, sync_scope = <system>, source_alignment_bytes = 8>>} : memref<?xi32>, !llvm.ptr
// CHECK-NEXT:     %old_1, %done_2 = dataflow.atomic_rmw %arg6[%0] %arg3 %done_0 {contract = #dataflow.rmw_contract<kind = min, access = <ordering = monotonic, sync_scope = <single_thread>, source_alignment_bytes = 4>>} : memref<?xi32>, !llvm.ptr
// CHECK-NEXT:     %old_3, %success, %done_4 = dataflow.cmpxchg %arg6[%0] %arg2 %arg3 %done_2 {contract = #dataflow.cmpxchg_contract<success_ordering = acq_rel, failure_ordering = monotonic, sync_scope = <single_thread>, source_alignment_bytes = 8, is_volatile = true>} : memref<?xi32>, !llvm.ptr -> i1
// CHECK-NEXT:     %1 = llvm.mlir.undef : !llvm.struct<(i32, i1)>
// CHECK-NEXT:     %2 = llvm.insertvalue %old_3, %1[0] : !llvm.struct<(i32, i1)> 
// CHECK-NEXT:     %3 = llvm.insertvalue %success, %2[1] : !llvm.struct<(i32, i1)> 
// CHECK-NEXT:     %old_5, %success_6, %done_7 = dataflow.cmpxchg %arg6[%0] %arg2 %arg3 %done_4 {contract = #dataflow.cmpxchg_contract<success_ordering = acq_rel, failure_ordering = seq_cst, sync_scope = <single_thread>, source_alignment_bytes = 8>} : memref<?xi32>, !llvm.ptr -> i1
// CHECK-NEXT:     %4 = llvm.mlir.undef : !llvm.struct<(i32, i1)>
// CHECK-NEXT:     %5 = llvm.insertvalue %old_5, %4[0] : !llvm.struct<(i32, i1)> 
// CHECK-NEXT:     %6 = llvm.insertvalue %success_6, %5[1] : !llvm.struct<(i32, i1)> 
// CHECK-NEXT:     %7 = dataflow.store %arg6[%0] %arg3 %done_7 {contract = #dataflow.atomic_access<ordering = release, sync_scope = <system>, source_alignment_bytes = 8>} : memref<?xi32>, !llvm.ptr
// CHECK-NEXT:     dataflow.graph.return %7 : none
// CHECK-NEXT:   }
// CHECK-NEXT: }
// CHECK-EMPTY: