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test.patch

diff --git a/test/raise/spectriad-mlir-stage-13-v1.mlir b/test/raise/spectriad-mlir-stage-13-v1.mlir
new file mode 100644
--- /dev/null
+++ b/test/raise/spectriad-mlir-stage-13-v1.mlir
@@ -0,0 +1,36 @@
+// RUN: loom-raise-opt --loom-lower-graph-memory %s | FileCheck %s
+
+module attributes {
+  llvm.data_layout = "e-p:64:64",
+  dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<index, 64>>
+} {
+  dataflow.graph private @source_memory_graph(
+      %start: none, %base: !llvm.ptr, %expected: i32, %desired: i32,
+      %index: i64, %cond: i1) -> ()
+      attributes {input_segments = array<i32: 5, 0, 0>,
+                  result_segments = array<i32: 0, 0, 0>} {
+    %ptr = llvm.getelementptr inbounds %base[%index]
+        : (!llvm.ptr, i64) -> !llvm.ptr, !llvm.array<4 x i8>
+    %rmw0 = llvm.atomicrmw umin %ptr, %desired syncscope("system") acq_rel {alignment = 8 : i64} : !llvm.ptr, i32
+    llvm.fence syncscope("singlethread") acq_rel
+    %rmw2 = llvm.atomicrmw add %ptr, %desired syncscope("singlethread") seq_cst {alignment = 8 : i64} : !llvm.ptr, i32
+    llvm.store %desired, %ptr atomic syncscope("singlethread") monotonic {alignment = 8 : i64} : i32, !llvm.ptr
+    %rmw4 = llvm.atomicrmw xchg %ptr, %desired syncscope("singlethread") release {alignment = 8 : i64} : !llvm.ptr, i32
+    llvm.fence syncscope("system") release
+    dataflow.graph.return %start : none
+  }
+}
+
+// CHECK: module attributes {dlti.dl_spec = #dlti.dl_spec<index = 64 : i64>, llvm.data_layout = "e-p:64:64"} {
+// CHECK-NEXT:   dataflow.graph private @source_memory_graph(%arg0: none, %arg1: !llvm.ptr, %arg2: i32, %arg3: i32, %arg4: i64, %arg5: i1, %arg6: memref<?xi32>) -> () attributes {input_segments = array<i32: 5, 0, 1>, result_segments = array<i32: 0, 0, 0>} {
+// CHECK-NEXT:     %0 = llvm.getelementptr inbounds %arg1[%arg4] : (!llvm.ptr, i64) -> !llvm.ptr, !llvm.array<4 x i8>
+// CHECK-NEXT:     %old, %done = dataflow.atomic_rmw %arg6[%0] %arg3 %arg0 {contract = #dataflow.rmw_contract<kind = umin, access = <ordering = acq_rel, sync_scope = <system>, source_alignment_bytes = 8>>} : memref<?xi32>, !llvm.ptr
+// CHECK-NEXT:     %1 = dataflow.fence %done {contract = #dataflow.fence_contract<ordering = acq_rel, sync_scope = <single_thread>>}
+// CHECK-NEXT:     %old_0, %done_1 = dataflow.atomic_rmw %arg6[%0] %arg3 %1 {contract = #dataflow.rmw_contract<kind = add, access = <ordering = seq_cst, sync_scope = <single_thread>, source_alignment_bytes = 8>>} : memref<?xi32>, !llvm.ptr
+// CHECK-NEXT:     %2 = dataflow.store %arg6[%0] %arg3 %done_1 {contract = #dataflow.atomic_access<ordering = monotonic, sync_scope = <single_thread>, source_alignment_bytes = 8>} : memref<?xi32>, !llvm.ptr
+// CHECK-NEXT:     %old_2, %done_3 = dataflow.atomic_rmw %arg6[%0] %arg3 %2 {contract = #dataflow.rmw_contract<kind = xchg, access = <ordering = release, sync_scope = <single_thread>, source_alignment_bytes = 8>>} : memref<?xi32>, !llvm.ptr
+// CHECK-NEXT:     %3 = dataflow.fence %done_3 {contract = #dataflow.fence_contract<ordering = release, sync_scope = <system>>}
+// CHECK-NEXT:     dataflow.graph.return %3 : none
+// CHECK-NEXT:   }
+// CHECK-NEXT: }
+// CHECK-EMPTY: