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output.generic.mlir

"builtin.module"() ({
  "dataflow.graph"() <{function_type = (!llvm.ptr, i32, i32, i64, i1, memref<?xi32>) -> (), input_segments = array<i32: 5, 0, 1>, result_segments = array<i32: 0, 0, 0>, sym_name = "source_memory_graph", sym_visibility = "private"}> ({
  ^bb0(%arg0: none, %arg1: !llvm.ptr, %arg2: i32, %arg3: i32, %arg4: i64, %arg5: i1, %arg6: memref<?xi32>):
    %0 = "llvm.getelementptr"(%arg1, %arg4) <{elem_type = !llvm.array<4 x i8>, noWrapFlags = 3 : i32, rawConstantIndices = array<i32: -2147483648>}> : (!llvm.ptr, i64) -> !llvm.ptr
    %1:2 = "dataflow.demux"(%arg5, %arg0) : (i1, none) -> (none, none)
    %2:2 = "dataflow.demux"(%arg5, %arg0) : (i1, none) -> (none, none)
    %3:2 = "dataflow.demux"(%arg5, %arg0) : (i1, none) -> (none, none)
    %4:2 = "dataflow.demux"(%arg5, %0) : (i1, !llvm.ptr) -> (!llvm.ptr, !llvm.ptr)
    %5:2 = "dataflow.demux"(%arg5, %arg3) : (i1, i32) -> (i32, i32)
    %6:2 = "dataflow.sync"(%1#1, %2#1) : (none, none) -> (none, none)
    %7:2 = "dataflow.sync"(%3#1, %8#1) : (none, none) -> (none, none)
    %8:2 = "dataflow.load"(%arg6, %4#1, %6#0) <{contract = #dataflow.atomic_access<ordering = seq_cst, sync_scope = <system>, source_alignment_bytes = 8>}> : (memref<?xi32>, !llvm.ptr, none) -> (i32, none)
    %9 = "dataflow.store"(%arg6, %4#1, %5#1, %7#0) <{contract = #dataflow.plain_access<is_volatile = false>}> : (memref<?xi32>, !llvm.ptr, i32, none) -> none
    %10:2 = "dataflow.atomic_rmw"(%arg6, %4#1, %5#1, %9) <{contract = #dataflow.rmw_contract<kind = umin, access = <ordering = acq_rel, sync_scope = <system>, source_alignment_bytes = 8>>}> : (memref<?xi32>, !llvm.ptr, i32, none) -> (i32, none)
    %11 = "dataflow.store"(%arg6, %4#1, %5#1, %10#1) <{contract = #dataflow.plain_access<is_volatile = true>}> : (memref<?xi32>, !llvm.ptr, i32, none) -> none
    %12 = "dataflow.mux"(%arg5, %3#0, %11) : (i1, none, none) -> none
    %13 = "dataflow.mux"(%arg5, %1#0, %10#1) : (i1, none, none) -> none
    "dataflow.graph.return"(%13, %12) <{operandSegmentSizes = array<i32: 0, 0, 0, 2>}> : (none, none) -> ()
  }) : () -> ()
}) {dlti.dl_spec = #dlti.dl_spec<index = 64 : i64>, llvm.data_layout = "e-p:64:64"} : () -> ()