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output.generic.mlir

"builtin.module"() ({
  "llvm.func"() <{CConv = #llvm.cconv<ccc>, function_type = !llvm.func<vector<8xf64> (vector<8xf64>, vector<8xf64>, vector<8xf64>)>, linkage = #llvm.linkage<external>, sym_name = "typed_1", unnamed_addr = 0 : i64, visibility_ = 0 : i64}> ({
  ^bb0(%arg6: vector<8xf64>, %arg7: vector<8xf64>, %arg8: vector<8xf64>):
    %4 = "math.fma"(%arg6, %arg7, %arg8) <{fastmath = #arith.fastmath<fast>}> : (vector<8xf64>, vector<8xf64>, vector<8xf64>) -> vector<8xf64>
    %5 = "math.fma"(%4, %arg7, %arg8) <{fastmath = #arith.fastmath<fast>}> : (vector<8xf64>, vector<8xf64>, vector<8xf64>) -> vector<8xf64>
    %6 = "math.fma"(%5, %arg7, %arg8) <{fastmath = #arith.fastmath<fast>}> : (vector<8xf64>, vector<8xf64>, vector<8xf64>) -> vector<8xf64>
    "llvm.return"(%6) : (vector<8xf64>) -> ()
  }) : () -> ()
  "llvm.func"() <{CConv = #llvm.cconv<ccc>, function_type = !llvm.func<f16 (f16, f16, f16)>, linkage = #llvm.linkage<external>, sym_name = "typed_2", unnamed_addr = 0 : i64, visibility_ = 0 : i64}> ({
  ^bb0(%arg3: f16, %arg4: f16, %arg5: f16):
    %2 = "math.fma"(%arg3, %arg4, %arg5) <{fastmath = #arith.fastmath<contract>}> : (f16, f16, f16) -> f16
    %3 = "math.fma"(%2, %arg4, %arg5) <{fastmath = #arith.fastmath<contract>}> : (f16, f16, f16) -> f16
    "llvm.return"(%3) : (f16) -> ()
  }) : () -> ()
  "llvm.func"() <{CConv = #llvm.cconv<ccc>, function_type = !llvm.func<vector<4xf32> (vector<4xf32>, vector<4xf32>, vector<4xf32>)>, linkage = #llvm.linkage<external>, sym_name = "typed_3", unnamed_addr = 0 : i64, visibility_ = 0 : i64}> ({
  ^bb0(%arg0: vector<4xf32>, %arg1: vector<4xf32>, %arg2: vector<4xf32>):
    %0 = "math.fma"(%arg0, %arg1, %arg2) <{fastmath = #arith.fastmath<nnan,contract>}> : (vector<4xf32>, vector<4xf32>, vector<4xf32>) -> vector<4xf32>
    %1 = "math.fma"(%0, %arg1, %arg2) <{fastmath = #arith.fastmath<nnan,contract>}> : (vector<4xf32>, vector<4xf32>, vector<4xf32>) -> vector<4xf32>
    "llvm.return"(%1) : (vector<4xf32>) -> ()
  }) : () -> ()
}) : () -> ()