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input.generic.mlir

"builtin.module"() ({
  "dataflow.graph"() <{function_type = (i64, i64, i64, i32, memref<?xi32>) -> i32, input_segments = array<i32: 4, 0, 1>, result_segments = array<i32: 1, 0, 0>, sym_name = "acc_0", sym_visibility = "private"}> ({
  ^bb0(%arg8: none, %arg9: i64, %arg10: i64, %arg11: i64, %arg12: i32, %arg13: memref<?xi32>):
    %5 = "scf.for"(%arg9, %arg10, %arg11, %arg12) ({
    ^bb0(%arg14: i64, %arg15: i32):
      %6 = "arith.index_cast"(%arg14) : (i64) -> index
      %7 = "memref.load"(%arg13, %6) : (memref<?xi32>, index) -> i32
      %8 = "arith.addi"(%arg15, %7) <{overflowFlags = #arith.overflow<none>}> : (i32, i32) -> i32
      "memref.store"(%8, %arg13, %6) : (i32, memref<?xi32>, index) -> ()
      "scf.yield"(%8) : (i32) -> ()
    }) : (i64, i64, i64, i32) -> i32
    "dataflow.graph.return"(%5, %arg8) <{operandSegmentSizes = array<i32: 1, 0, 0, 1>}> : (i32, none) -> ()
  }) : () -> ()
  "dataflow.graph"() <{function_type = (i64, i64, i64, i32, memref<?xi32>) -> i32, input_segments = array<i32: 4, 0, 1>, result_segments = array<i32: 1, 0, 0>, sym_name = "acc_1", sym_visibility = "private"}> ({
  ^bb0(%arg0: none, %arg1: i64, %arg2: i64, %arg3: i64, %arg4: i32, %arg5: memref<?xi32>):
    %0 = "scf.for"(%arg1, %arg2, %arg3, %arg4) ({
    ^bb0(%arg6: i64, %arg7: i32):
      %1 = "arith.addi"(%arg6, %arg1) <{overflowFlags = #arith.overflow<none>}> : (i64, i64) -> i64
      %2 = "arith.index_cast"(%1) : (i64) -> index
      %3 = "memref.load"(%arg5, %2) : (memref<?xi32>, index) -> i32
      %4 = "arith.addi"(%arg7, %3) <{overflowFlags = #arith.overflow<none>}> : (i32, i32) -> i32
      "memref.store"(%4, %arg5, %2) : (i32, memref<?xi32>, index) -> ()
      "scf.yield"(%4) : (i32) -> ()
    }) : (i64, i64, i64, i32) -> i32
    "dataflow.graph.return"(%0, %arg0) <{operandSegmentSizes = array<i32: 1, 0, 0, 1>}> : (i32, none) -> ()
  }) : () -> ()
}) : () -> ()